Advances in microelectronics technology tend to develop chips which occupy less physical space while performing more electronic functions. Conventionally, the chips are packaged for use in housings which protect the chip from its environment and provide input/output communication between the chip and external circuitry through sockets or solder connections to a circuit board or the like. Miniaturization results in the generation of more heat in less physical space and with less structure for transferring heat from the package.
It is generally desirable to optimize an electronic assembly by providing a maximum number of packages in a minimum amount of space. Similarly, the development of electronic circuits using compound semiconductors further expands the packaging requirements to control device temperatures by heat dissipation for devices which operate at higher temperatures.
One type of semiconductor chip package includes one or more semiconductor chips mounted on a circuitized surface of a substrate, e.g., a ceramic substrate or a plastic substrate. Such a semiconductor chip package, conventionally termed a chip carrier, is usually intended for mounting on a printed circuit card or printed circuit board. In the case of a Ball Grid Array (BGA) package, the chip carrier will include a second circuitized surface opposite the surface to which the chip is attached, which is in turn connected to the printed circuit card or printed circuit board.
One way to obtain a relatively high density of chip connections is readily achieved by mounting one or more semiconductor chips on the circuitized surface of a chip carrier substrate in the so-called flip chip configuration. In this configuration, the chip or chips are mounted active side-down on solderable metal pads on the substrate using solder balls, a controlled collapse chip connection (C4), a gold bump, or a conductive epoxy. Unfortunately, the coefficient of thermal expansion (CTE) of, for example, a silicon chip is significantly different from the CTE of a plastic substrate. As a consequence, if a chip carrier is subjected to thermal fluctuations, then the solder ball connections will be subjected to significant stresses, which tend to weaken, and reduce the fatigue life of, the solder ball connections.
Another way to mount a chip to a substrate is to use a wirebond attachment. Cost is one of the primary considerations when choosing a wirebond chip carrier package. Plastic flatpacks and plastic ball grid array (PBGA) chip overmolded packages are often chosen as possible chip carrier solutions because of their low cost. One major problem with these chip carriers is, however, that they are inherently poor thermal performers because they are plastic. With the common trend in electronic packaging of increasing chip powers, compounded with competitive pricing, packaging engineers are pushing the thermal threshold of these packages. These higher power chips are beginning to require enhanced thermal solutions, but the cost of these thermal solutions adds significant development and manufacturing costs and, thus, increases the overall price of the product.
In order to conduct heat from the chip to the exterior of the package, many device packages include a high thermal conductivity transfer medium which is in thermal communication with the chip and has a dissipation surface adjacent to the surface of the package. Other packages merely conduct the heat through the material of the package itself. In order to further dissipate heat from the package, an external heatsink may be attached to the device package. Typically, the heatsink is a body of material such as metal which has a relatively high thermal conductivity. The heatsink ordinarily has at least one flat face for positioning adjacent to a face of the device package and may include fins, pins, or other structures for dissipating thermal energy into the surrounding atmosphere.
FIGS. 1A and 1B illustrate a prior art method for attaching a heatsink 100 to plastic package 102 (comprising laminate 106 and overmold 108). The prior art consists of epoxy attach 104 as shown in FIG. 1A (which tends to be expensive and adds extra processing steps) or a clip 110(as shown in FIG. 1B) around the edge of laminate 106 which causes laminate 106 to separate or warp resulting in intermittent contact with the circuit board as a result of the force exerted on plastic package 102.
U.S. Pat. No. 5,510,956 issued to Suzuki discloses a device for attaching a heatsink to an integrated circuit chip. As shown in FIG. 1C, circuit chip 120 is attached to substrate 122. Resin 124 insulates circuit chip 120 from metal encapsulant 126. Heatsink 128 is then attached to metal encapsulant 126 by soldering heatsink 128 to metal encapsulant 126. This is a labor-intensive process and does not allow simple detachment of heatsink 128.